Senior DFT Design Engineer for ML Acceleration SoCs

Annapurna Labs (U.S.) Inc. in the United States is seeking a Sr. DFT Design Engineer to design and optimize DFT for advanced ASICs in Cloud-Scale ML acceleration.

You will collaborate with PD, Architecture, and Product Engineering to align schedules and deliver high-quality DFT from RTL to silicon. The role requires 5+ years in ASIC design, strong scripting skills, and in-depth DFT knowledge (ATPG, JTAG, MBIST).