OLIX in Austin, TX is seeking a Senior/Staff DFT Engineer to own end-to-end design-for-test for high‑performance ASICs. You will define test strategies, implement DFT features, and bring up silicon in collaboration with cross‑functional teams.
The ideal candidate has 7+ years in DFT, with experience in Scan/ATPG, Boundary Scan, Memory BIST, and RTL development (SystemVerilog/Verilog/VHDL). Strong scripting in Python or Tcl and a proven ability to improve test coverage and yield.
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