A leading engineering talent provider is seeking a Design Verification Engineer for a contract position. The ideal candidate will have 5+ years of experience, strong knowledge in SystemVerilog/UVM, and hands-on experience in IP Block-level and SoC/Full Chip verification. Proficiency in C programming and strong problem-solving skills are essential. This role offers flexible work locations, including remote options.
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Senior Design Verification Engineer (SoC/UVM, Remote) in california at Unknown Company
This position is listed as contract and able to be worked remotely.