Pyramid Consulting, Inc. has an immediate Design Verification Engineer opening in San Francisco, CA. This onsite, fulltime role offers long-term potential with competitive pay and comprehensive benefits.
The ideal candidate brings 6+ years in verification of digital and mixed-signal circuits, SystemVerilog/UVM/SVA expertise, and experience with major EDA tools. A BS or MS in EE/CE with relevant experience is required.
#J-18808-LjbffrSenior Design Verification Engineer – Onsite SF in san francisco at Unknown Company
This position is listed as full time and onsite.