Senior Design Verification Engineer, ML Accelerator SOCs

Annapurna Labs (U.S.) Inc. in Austin, TX is seeking experienced Design Verification Engineers to design and optimize custom silicon for data centers.

You will verify SOC designs, integrate IPs, and create robust testplans, driving coverage and regression infrastructure. Ideal candidates have extensive SystemVerilog/UVM experience, strong testbench skills, and familiarity with AMBA, PCIe/UCIe, memory subsystems, and accelerator designs.