Velaura in Santa Clara, California, is seeking a Design Verification Engineer to verify its next-generation Physical AI SoC focused on a custom CPU. You will collaborate with architects, RTL, software and system teams to ensure correctness, performance, reliability and safety across RTL blocks and complete hardware/software systems running real workloads.
You will own a functional verification domain from test plan through coverage closure, building portable environments using SystemVerilog,
#J-18808-LjbffrSenior CPU Design Verification Engineer in santa clara at Unknown Company
This position is listed as full time and onsite.