Google's Raxium display group seeks a Senior Test Engineer to design and validate CMOS backplane test solutions for microLED displays, collaborating with CMOS and panel teams to ensure robust hardware and scalable test protocols.
You will work in a fast-paced R&D environment in Fremont, applying silicon test development, instrumentation, and firmware concepts to improve yield and reliability across the global manufacturing network.
#J-18808-LjbffrSenior CMOS Backplane Test Engineer | R&D in jasper at Unknown Company
This position is listed as full time and onsite.