NVIDIA Corporation in Santa Clara, CA seeks a Senior Circuit Design Engineer to advance digital, mixed-signal, and analog IPs across silicon. You will partner with global teams to optimize timing, noise, and power, drive prototypes, and mentor junior engineers.
You should have a BSEE or MS in EE with 8+ years of experience in deep submicron design, Spice simulations, and RTL/Place and Route. NVIDIA offers equity and comprehensive benefits in a hybrid work environment.
#J-18808-LjbffrSenior Circuit Design Engineer: Noise & Timing Expert in santa clara at Unknown Company
This position is listed as full time and hybrid.