SpaceX is seeking a Sr. ASIC Design Verification Engineer for its Starshield team, focusing on advanced FPGA/ASIC verification for space and ground infrastructure.
You will lead verification at block and system levels and develop test harnesses and UVM-based testbenches. The role requires 5+ years in design verification, strong SystemVerilog and Python skills, and experience with constrained random verification.
#J-18808-LjbffrSenior ASIC Verification Engineer for Space & Satellite in irvine at Unknown Company
This position is listed as full time and onsite.