AMD is seeking an ASIC Design STA engineer in San Jose, CA, to contribute to the development of large SoCs. Responsibilities include building timing constraints for intricate designs and automating processes for efficiency. The ideal candidate will have extensive experience in SDC, EDA tools like Synopsys Design Compiler and PrimeTime, and strong scripting skills. A Bachelor's or Master's degree in Engineering is required. This role does not offer visa sponsorship but invites diverse applicants.
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