NVIDIA Corporation is seeking a DFT-Timing Engineer to drive timing analysis and closure for DFT logic across GPUs, CPUs, DPUs, LPUs, and SoCs. You will collaborate with PD, DFX, and Clocks teams to craft timing constraints, implement ECOs, and push for efficient convergence in advanced nodes.
The ideal candidate has a strong STA background, ECO experience, and a track record in developing robust timing workflows, with equity and comprehensive benefits offered.
#J-18808-LjbffrSenior ASIC Timing & DFT Engineer - Equity, AI GPUs in santa clara at Unknown Company
This position is listed as full time and onsite.