NVIDIA Corporation in Massachusetts seeks a Senior ASIC Timing Engineer to join our Networking Silicon team in Westford. You will drive timing closure for high-frequency DPUs and SoCs from RTL to GDS2, analyzing constraints and optimizing performance, power, and area.
Ideal candidates hold a BS or MS in Electrical/Computer Engineering with 4–8+ years in synthesis, STA, ECOs, and physical design, and are proficient with PrimeTime or Tempus and scripting in Python/Tcl.
#J-18808-LjbffrSenior ASIC Timing & Design Engineer (Equity) in westford at Unknown Company
This position is listed as full time and onsite.