Positron AI seeks a Senior Mid-End ASIC Engineer to own synthesis, timing convergence, and implementation-ready netlists for AI accelerator chips. You will drive QoR, constraints, and a timing-closure strategy while partnering with RTL, verification, and backend teams.
The role requires hands-on work with Cadence Genus and Design Compiler, and expertise across SDC, MMMC, and scripting (Tcl/Python) on 5nm+ nodes. Remote-first environment with competitive compensation.
#J-18808-LjbffrSenior ASIC Synthesis & Timing Lead for AI Accelerators in austin at Unknown Company
This position is listed as full time and able to be worked remotely.