Senior ASIC STA Engineer – High‑Speed Optical Interconnects

Acacia, part of Cisco, seeks an ASIC Design Engineer on the STA team to advance high‑speed optical interconnects that scale networks. You will collaborate with cross‑functional teams to meet timing, performance, and quality goals.

Responsibilities include developing STA methodologies and checklists, solving timing and flow issues, and driving execution to maintain progress and accuracy in STA processes using Verilog/SystemVerilog.