Senior ASIC Physical Design Engineer: RTL to GDSII Expert

Jobtailor seeks an experienced ASIC Physical Design Engineer in Colorado to lead end-to-end implementation from RTL to GDSII. You will plan floorplanning, power planning, P&R, clock tree synthesis, and routing, ensuring timely, heat-aware, and manufacturable tapeouts.

You will drive timing closure through multi-mode/multi-corner analyses, perform signoff checks, and collaborate with RTL, verification, DFT, and packaging teams. Strong scripting is essential.