Annapurna Labs (U.S.) Inc. seeks an ASIC Physical Design Engineer to drive physical implementation of server-grade SoCs in AWS data centers. You’ll collaborate with RTL/Arch teams and optimize flows for synthesis, floorplanning, place-and-route, and sign-off to ensure high-quality silicon.
Requirements: 6+ years in ASIC Physical Design (RTL-to-GDSII) across 7nm–28nm, scripting in Python/Perl/Bash/PowerShell, and Cadence/Mentor/Synopsys toolchains.
#J-18808-LjbffrSenior ASIC Physical Design Engineer for Cloud ML in austin at Unknown Company
This position is listed as full time and onsite.