Broadcom, Inc. in Fort Collins, Colorado, is seeking a Floorplan Engineer to drive chip-level physical architecture for advanced ASICs beyond 1 GHz. You will shape top-level floorplan, partitioning, and hierarchy across AI, networking, and computing SoCs from concept to production.
Join a world-class design team using 3 nm and smaller nodes, collaborating with RTL, timing, and packaging to optimize PPA and ensure tapeout readiness. Strong TCL scripting, Linux, and Cadence tooling are required.
#J-18808-LjbffrSenior ASIC Floorplan Engineer for 3nm SoCs in fort collins at Unknown Company
This position is listed as full time and onsite.