Senior ASIC Engineer - Ultra-Low Latency & Tooling Leader

Jane Street in the United States (KY) seeks an experienced ASIC Engineer to design, test and deploy advanced hardware for our Ultra Low Latency team, collaborating with trading, networking and research infrastructure.

You will work on both FPGA-based and ASIC-based technologies, leveraging Hardcaml and OCaml tools. Proficiency in Python, C++, Java or Haskell is valued, and base salary ranges from $250,000 to $300,000, with discretionary annual bonus.