Senior ASIC DV Engineer | Verilog/UVM for Satellites

E-Space is looking for a Digital Design Verification Engineer in Saratoga, CA, to verify custom ASICs used in satellite and wireless telephony. The position requires proficiency in Verilog, SystemVerilog, and UVM, along with at least 4 years of relevant design verification experience in the semiconductor industry. E-Space offers a competitive salary with a target base pay between $120,000 and $220,000 annually, and benefits including health care options and paid time off.
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