Senior ASIC DFT STA Engineer - Timing & Validation

Cisco Systems, Inc. is seeking an ASIC DFT STA Engineer to join the Silicon One development organization in San Jose.

You will drive timing constraints, DFT/STA strategies, and work across RTL design, CDC/RDC, and verification efforts to enable successful post-silicon validation. You will collaborate with diverse teams, contribute to design signoff activities, and help deliver next-generation networking chips for a global customer base.