Senior ASIC Design Engineer: RTL to Tape-out for SoC

Qualcomm is seeking a skilled ASIC designer to join their Santa Clara team. This role requires significant experience in micro-architecture and design integration, with hands-on responsibilities throughout the ASIC lifecycle. Successful candidates will collaborate closely with various teams to ensure effective releases.

The position offers a competitive salary range from $126,700.00 to $190,100.00, alongside an attractive benefits package, including a discretionary bonus program and RSU grants.