Amazon in Cupertino, CA is seeking an ASIC Design Engineer to design and optimize high-performance RTL hardware for AWS machine-learning datacenters. You will develop SystemVerilog RTL and microarchitectures, balancing power, area, and performance while coordinating with architects, verification, and back-end teams.
The role emphasizes a strong ASIC design background, SystemVerilog proficiency, and problem-solving skills, with a focus on scalable, energy-efficient solutions for data-center
#J-18808-LjbffrSenior ASIC Design Engineer II - High-Perf SoCs (RSUs) in cupertino at Unknown Company
This position is listed as full time and onsite.