Senior ASIC Design Engineer – High‑Speed Networking

Cornelis Networks is seeking a Senior ASIC Design Engineer to develop high-performance SoCs in a remote position. The ideal candidate will have 8+ years of experience in digital design with proficiency in Verilog/System Verilog. Key responsibilities include implementing RTL designs and collaborating with verification teams. The role offers competitive compensation, including equity, cash, benefits, and a flexible work environment.
#J-18808-Ljbffr