Hewlett Packard Enterprise Development LP in Roseville, California, is looking for a Sr. ASIC Design Engineer. The role involves designing high-speed ASICs, collaborating with teams on verification and physical design, and mentoring junior engineers. Candidates should possess a Bachelor’s in Electrical Engineering, relevant experience, and strong coding abilities in Verilog/System Verilog. The position offers opportunities for personal and professional development, competitive salary, and a collaborative work environment.
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