Senior ASIC Back-End Design Engineer (Synthesis to Tapeout)

Johns Hopkins Applied Physics Lab is seeking an experienced Senior ASIC Physical Design Engineer based in Laurel, Maryland. This role involves managing digital back-end flow of ASIC designs with responsibilities that include timing analysis, process selection, and physical verification. Join a dedicated team working on critical national security projects.

Applicants should have substantial experience in ASIC design, strong problem-solving skills, and the ability to obtain necessary security clearance. The position offers a competitive salary and comprehensive benefits.