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Senior ASIC Back-End & Physical Layout Engineer

laurel, md • Posted 1 weeks ago
Onsite Full Time Physics

Johns Hopkins Applied Physics Laboratory seeks an experienced Senior Physical Design ASIC Engineer to advance miniature systems for various applications. In this role, you'll manage the digital back-end flow from synthesis to layout and perform essential physical verification.

The successful candidate will have at least 6 years of ASIC design experience, familiarity with Cadence tools, and the ability to obtain a security clearance. Enjoy a generous benefits package and a healthy work/life balance.

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