Senior Application Engineer - Semiconductor Test

Advantest America Semiconductor Test Application EngineerAdvantest America develops and supports advanced semiconductor test solutions for next-generation SoC, high-performance computing, RF, and mixed-signal products. We are building a high-caliber application engineering team for engineers who want ownership, customer impact, and hands-on access to leading-edge ATE, silicon, and lab infrastructure as demand for AI compute and inference accelerates.The RoleThis role places you near one of the most important semiconductor buildouts underway: AI compute and inference. You will help bring up, validate, and optimize advanced SoC devices for high-performance computing and large-scale AI infrastructure—working across silicon, software, ATE, and customer programs.We are seeking a hands-on Semiconductor Test Application Engineer in San Jose, CA.

This role is ideal for an experienced ATE, validation, test development, or system-level debug engineer who wants to solve complex semiconductor test challenges with lab hardware, customer teams, and next-generation Advantest V platforms.You will become a key technical owner for Advantest SmarTest 8 and V93000-based SoC test solutions, helping architect, debug, and optimize production-grade test programs for complex devices. Because the work includes hardware bring-up, lab execution, customer collaboration, and fast-moving ramps, the position is based on-site.What You Will DoTest Program Development: Architect, write, debug, and optimize SoC test programs in modern ATE software environments, including Advantest SmarTest 8, for advanced AI compute, inference, and high-performance semiconductor devices.Silicon Bring-Up and Validation: Support and help drive first-silicon bring-up on V93000 testers, debugging interactions between silicon, system behavior, test content, and the tester environment.Pattern Workflow Engineering: Drive pattern translation, validation, and debug across DFT and tester workflows. Work with STIL, WGL, or comparable pattern sources; support tester bring-up; and collaborate with design and product engineering on emerging virtual test workflows using SmarTest 8 and V93000 environments.Hardware Co-Design and Debug: Collaborate with PCB and hardware teams to specify, validate, and troubleshoot high-density Device Interface Boards (DIBs), including signal integrity, power delivery, and tester-to-device interfaces.Test Time and Automation: Build automation in Python, Java, C++, or similar languages to analyze logs and STDF data, streamline debug, interface with test platforms, improve multi-site efficiency, and accelerate learning loops.Why Join Us?Hands-On Lab Access: Get direct access to advanced V93000 testers, complex SoC bring-up environments, and lab infrastructure for real customer test challenges.Silicon Valley Impact: Work with leading design, architecture, DFT, and customer engineering teams on AI compute and inference devices where test strategy, debug speed, and production readiness affect time-to-market.Career Growth: Build deep expertise in V93000 and SmarTest 8 while applying your ATE, validation, hardware debug, or automation background to AI compute and inference programs.If you are an ATE, semiconductor validation, test development, or hardware/software debug engineer ready to help power the next wave of AI compute, we would like to hear from you.