d-Matrix is seeking a hands-on senior analog/mixed-signal designer to own the clocking subsystem of our high-speed SerDes on the IO chiplet. You will carry designs from specification through silicon characterization, porting clocking blocks to new nodes and collaborating with datapath, DSP, digital, and firmware teams to meet timing, jitter budgets, and calibration.
The role involves owning PLL/LC or ring PLL designs, phase interpolator/rotation, high-frequency clock distribution, CDR loop
#J-18808-LjbffrSenior Analog Design Engineer - Clocking & SerDes Lead in santa clara at Unknown Company
This position is listed as full time and onsite.