RTL Design Engineer: AI Chip & Tapeout Expert

Normal Computing seeks an RTL Design Engineer to shape the digital logic at the heart of its thermodynamic hardware. You will own RTL from microarchitecture to tapeout, writing SystemVerilog and ensuring synthesis and placement/route meet area and timing goals.

Collaborate with architecture, verification, and physical design teams to drive architecture decisions as the spec evolves and tapeout approaches. This role thrives on cross-team collaboration and hands-on silicon experience.