Mercor is seeking an ASIC/SoC Design & Verification Engineer for a remote, contract role. The position involves crafting realistic chip problems, developing RTL and testbenches in SystemVerilog/Verilog, and evaluating AI models by running engineering tasks.
Strong RTL, IP integration, and verification expertise are required, with availability for 20–40 hours per week. Remote work offers flexibility while collaborating with a team to maintain high standards of rigor.
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