Chelsea Search Group is seeking a Senior/Principal Physical Design Engineer to lead physical implementation for complex ASICs from RTL through GDSII and tapeout. You will own floorplanning, CTS, routing, timing closure, and PPA optimization using Fusion Compiler and Calibre, collaborating with RTL, DFT, analog/mixed-signal, and packaging teams.
The role emphasizes mentorship, leadership, and a track record of first-pass success in RTL-based digital IC design with Verilog/SystemVerilog.
#J-18808-LjbffrRemote Senior/Principal ASIC Physical Design Engineer in san jose at Unknown Company
This position is listed as full time and onsite.