TylSemi, Inc. in San Jose, CA is seeking a Principal Mixed Signal RTL Design Engineer to lead micro-architecture and RTL for AI-oriented chiplet power optimization.
You will own toplevel RTL for mixed-signal chips including analog circuits, micro-controllers and digital logic, delivering production-quality RTL and robust verification. The role demands deep expertise in mixed-signal design, digital control, and DPWM/IVR technologies, with 8+ years in power management ICs or high-performance
#J-18808-LjbffrRemote-Ready Principal Mixed-Signal RTL Engineer in san jose at Unknown Company
This position is listed as full time and onsite.