Principal Hardware Design Engineer – Systems EngineeringPrincipal Hardware Design Engineer – Systems Engineering to join the Central Engineering business group in Santa Clara, CA. The selected candidate will contribute to advanced printed circuit board (PCB) engineering initiatives supporting Automotive, Storage, Security, and Networking product groups. This role focuses heavily on high-speed signal integrity engineering, PCIe Gen5/Gen6 reference board design, power integrity analysis, validation board implementation, package collaboration, and cloud compute systems.
The ideal candidate will possess deep expertise in high-speed PCB design, signal integrity analysis, SERDES technologies, PCIe protocols, power delivery systems, and board bring-up/debug activities within complex semiconductor environment.Key ResponsibilitiesDesign high-speed reference boards for PCIe Gen5/Gen6 chip validationCapture schematics and support PCB layout implementationWork with PCB layout vendors and external design teamsSelect and implement board-level power schemesDesign and validate low-voltage, high-current multi-phase SMPS systemsSupport enterprise server reference systems using PCIe Gen5 CEM sockets and EDSFFSignal Integrity & Power Integrity EngineeringEstablish Signal Integrity (SI) specifications and implementation guidelinesPerform SI simulations and validation analysisConduct Power Integrity (PI) simulations and analysisAnalyze: Transmission linesVia structuresHigh-speed connectorsComplex BGA packagesCollaborate with package design and SI engineering teamsSupport routing guidance for board layout teamsValidation & Debug SupportParticipate in board bring-up and chip debug activitiesSupport programming of various memory devicesWork closely with RTL teams to implement hardware features and interfacesAssist with design validation and hardware characterizationCross-Functional CollaborationCollaborate with: SI EngineersRTL TeamsPackage Design TeamsPCB Layout VendorsExternal CustomersSupport customer implementations and reference designsWork with external vendors to resolve technical issues and complete board designsMust-Have QualificationsBachelor's Degree in: Electrical EngineeringComputer ScienceRelated Engineering Field5–10 years of related professional experience ORMaster's Degree / PhD with 3–5 years of related experienceExperience as Lead Signal Integrity EngineerStrong understanding of: Electromagnetic (EM) fundamentalsHigh-speed PCB designSignal Integrity conceptsPower Integrity conceptsExperience with: High-speed differential pair designPCIe Gen4 / Gen5 / Gen6PAM-4 technologiesSERDES analysis (25Gbps+)Reference board design for chip validationStrong knowledge of PCB design issues associated with high-speed systemsExperience with: Power controller designMulti-phase SMPSClock generation/distributionComponent selectionExperience using SI/EM tools including: SigritySI SoftHFSSHSPICEFamiliarity with: Real-Time ScopeVBATDRExperience with schematic capture and PCB layout tools Preferably Cadence ConceptStrong communication and customer-facing skillsPreferred QualificationsExperience with: ADSQSI/QDCHyperlynxExperience running and summarizing Power Integrity simulationsExperience collaborating with characterization teamsFamiliarity with cloud compute systemsExperience with mechanical design conceptsExperience supporting package design activitiesExperience working in semiconductor or hyperscale infrastructure environmentsCore SkillsSignal Integrity (SI)Power Integrity (PI)High-Speed PCB DesignPCIe Gen5 / Gen6SERDESPAM-4PCB LayoutReference Board DesignEM SimulationHFSSHSPICESigritySI SoftPower Delivery SystemsMulti-Phase SMPSCadence ConceptTDRRTL CollaborationHardware ValidationCloud Compute SystemsPackage DesignHigh-Speed Differential Pair Design