Principal Verification Engineer
San Jose Avecas Technologies Design Verification 12+ yrs Full-time
Job Description
Drive chip-level verification strategy for complex SoCs. Own coverage closure, regression infrastructure, and silicon-quality signoff.
Required Skills
Domain
Location
San Jose
Type
Full-time
Posted
Delivering VLSI excellence from five strategic locations worldwide
4th Floor, Radhe Heights,
Madhapur, Hyderabad
India
United States
30 N Gould St Ste R,
Sheridan, WY 82801
United Kingdom
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