Principal/ Sr. Principal Digital Verification Engineer

RELOCATION ASSISTANCE: Relocation assistance may be available

CLEARANCE REQUIRED FOR START: Yes

CLEARANCE TYPE: Secret

TRAVEL: Yes, 10% of the Time

Description

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

We are looking for you to join our team as a Principal Digital Verification Engineer or Sr. Principal Digital Verification Engineer based out of San Diego, CA. At the Northrop Grumman San Diego campus our Advanced Digital Design organization creates the next generation of communications and signal processing systems and will take ideas from concept to working systems aboard the world’s most advanced platforms right here in always-sunny San Diego. We design in our campus of labs and on-site advanced manufacturing just minutes from the beach and everything for which southern California is famous. It’s work that matters and a career that can take you places. We seek degreed electrical or computer engineering engineers with hands-on experience in FPGA Verification with VHDL.

You will be responsible for digital designs associated with multi-function software-defined radios. Systems include state-of-art radios and test equipment for military applications.

This is a dual level requisition which can be filled as a Principal Digital Verification Engineer or Sr. Principal Digital Verification Engineer.

This position is contingent upon the ability to obtain a US Government secret clearance and future program awards.

Job Description:

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  Define and maintain digital logic design verification frameworks and architectures for software-defined radio systems

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  Develop a verification plan based on digital logic design requirements and design specifications

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  Simulate and verify FPGA logic designs, requirements, and perform system validation

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  Analyze and debug simulation failures, determine root causes of bugs, and work with designers to resolve issues

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  Perform regression testing and generate verification metrics and reporting

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  Operate in a team environment with 5-7 engineers

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Basic Qualifications for a Principal:

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  Bachelor’s degree in Electrical Engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline

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  5+ years of digital verification engineering experience using industry standard simulation tools (3+ years with an MS degree; 1+ years with PhD)

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  Experience in VHDL design and verification methodologies for DoD communications systems

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  FPGA deployable product process experience (requirements definition, conceptual design, detailed design, verification, and production release)

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  Experience developing verification plans, functional tests, test benches, and bus functional models

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  Experience with forecasting and estimating schedules for assigned tasks

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  Demonstrated strong analytical skills and the ability to prioritize assignments according to program goals

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  Experience using Siemens Questa Simulator

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  Must be a US Citizen with the ability to obtain and maintain a Security Clearance

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Basic Qualifications for a Sr. Principal:

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  Bachelor’s degree in Electrical Engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline

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  8+ years of digital verification engineering experience using industry standard simulation tools (6+ years with an MS degree; 4+ years with PhD)

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  Experience in VHDL design and verification methodologies for DoD communications systems

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  FPGA deployable product process experience (requirements definition, conceptual design, detailed design, verification, and production release)

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  Experience developing verification plans, functional tests, test benches, and bus functional models

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  Experience with forecasting and estimating schedules for assigned tasks

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  Demonstrated strong analytical skills and the ability to prioritize assignments according to program goals

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  Experience using Siemens Questa Simulator

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  Must be a US Citizen with the ability to obtain and maintain a Security Clearance

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Preferred Qualifications:

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  Active Security Clearance

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  Experience with functional verification methodology using OSVVM for the full life cycle of products

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  Experience with scripting languages for Verification automation in a Linux environment (Perl, TCL, Bash, and Makefile)

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  Experience using Siemens formal applications such as Lint, Inspect, and CDC

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  Ability to hold special access program clearances

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Primary Level Salary Range: $125,300.00 - $187,900.00

Secondary Level Salary Range: $156,400.00 - $234,600.00

The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.

Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.

Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

Job Category: Engineering