Principal SoC Verification Architect (AI & Networking)

A leading semiconductor company in California seeks a Principal Design Verification Engineer to lead verification for advanced ASICs. The ideal candidate will have more than 8 years of experience in SoC verification, especially in server and networking applications. Responsibilities include leading functional verification, collaborating with teams to execute test plans, and debugging verification failures. Candidates should have expertise in SystemVerilog and excellent communication skills. Salary range is $185,000 to $230,000 with potential bonuses and benefits.
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