Astera Labs seeks a Principal Physical Design Engineer-Methodology to define, develop, and maintain reusable physical design flows and automation infrastructure. You will own the RTL-to-GDSII flow and coordinate across Cadence and Synopsys toolchains to improve PPA and schedule predictability.
This on-site role is based in San Jose, CA, with responsibilities spanning multi-vendor environments. You will lead automation and scale initiatives, build QoR tracking, and collaborate with IT to optimize
#J-18808-LjbffrPrincipal PD Methodology Engineer – Flow Automation in santa clara at Unknown Company
This position is listed as full time and onsite.