Rambus is seeking a motivated full-time Principal Design engineer to join our PCIe IP design team in Hillsboro, Oregon. The role focuses on architecture, micro-architecture, and hands-on RTL implementation, with collaboration across global teams.
The successful candidate will prototype IPs on cutting-edge FPGAs, support existing IPs, and thrive in a hybrid work environment that combines onsite collaboration with remote work days.
#J-18808-LjbffrPrincipal PCIe RTL Design Engineer — Hybrid in hillsboro at Unknown Company
This position is listed as full time and able to be worked remotely.