Principal NoC IP Micro-Architect - RTL & SoC Interconnect Lead

Altera is seeking a Principal NoC IP Micro‑Architect in San Jose, CA to lead end‑to‑end architecture and RTL design for high‑performance interconnect IPs within next‑generation FPGA platforms. You will collaborate across architecture, design, verification, software, physical design, and product teams to optimize power, performance, area, and reliability.

This senior role requires deep expertise in SoC interconnects, NoC fabrics, performance modeling, and system-level optimization, with a track