Altera in San Jose seeks a Principal NoC IP Micro-Architect to lead end-to-end architecture, RTL design, and validation of scalable NoC IPs for next-generation FPGA platforms. You will collaborate with architecture, design, verification, software, physical design, and product teams to optimize power, performance and area while mentoring the NOC team.
15+ years of experience in relevant fields and a strong background in SystemVerilog, FPGA design, and Network-on-Chip IPs are required for this
#J-18808-LjbffrPrincipal NoC IP Architect - SoC Interconnect Leader in san jose at Unknown Company
This position is listed as full time and onsite.