Principal IC Digital Design - SoC Design/Micro-architecture

Principal Digital Ic Design Engineer (De06t5)Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.Your team, your impactMarvell custom solutions develops cutting-edge solutions for large AI, cloud data center, and telecom customers.

The SoCs encompass best-in-class performance, advanced die-to-die and packaging technology, and optimized low-power techniques.What you can expectAs a principal design engineer, you will lead micro-architecture and RTL development and HW/SW co-design efforts working across multi-functional teams, in developing state-of-the-art designs.Essential Duties And ResponsibilitiesOwn RTL design, implementation, and integration of complex blocks or subsystemsDefine and influence block-level and subsystem-level micro-architectureDevelop high-quality, synthesizable RTL using Verilog/SystemVerilogEnsure design correctness through lint, CDC, RDC, and peer reviewsCollaborate with verification, validation, firmware and synthesis/STA, and physical design teamsIdentify and resolve complex functional, timing, power and integration issuesContribute to digital design methodologies and best practicesMentor and guide junior engineersParticipate in design reviews and tape-out readinessRequired QualificationsBachelor's or master's degree in electrical engineering, computer engineering, or related field12+ years of experience in digital IC or SoC RTL designDeep expertise in RTL using system verilog design and micro-architectureStrong understanding of clocking, reset, and power-aware design, SoC architecture, processor cores, memory, peripheral interfaces through hand on prior experienceHands-on experience with lint, CDC, and RDC analysisProven ownership and track record of block or subsystem delivery on production silicon with aggressive development schedules.Strong debugging and problem-solving skills and multi-taskingExperience with ARM AMBA, PCIE, DDR, LPDDR, I2C/SMBus, I3C, USB, UART, QSPI/SPIHands on experience in interpretive language such as Perl/Python.Preferred QualificationsExperience with large-scale SoC integrationFamiliarity with low-power design techniquesExposure to synthesis, STA, or physical design flowsExperience mentoring engineers or leading technical reviewsExpected base pay range (USD)158,600 - 237,600, $ per annumThe successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.Additional compensation and benefit elementsMarvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.

Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.