Principal FPGA / RTL Design Engineer - Signal Processing

Opportunity

Silvus is seeking a Principal FPGA / RTL Design Engineer - Signal Processing who will report to the Senior Engineering Director in Irvine and work closely with the FPGA Engineering team. The successful individual will participate in all aspects of the research and development process from concept to field deployment. This role is 100% onsite, Monday through Friday, at Silvus Technologies’ Engineering and R&D Office in Irvine, CA , near the vibrant Irvine Spectrum.

Role and Responsibilities

• Working with system engineers and digital design architecting for wireless communication projects, including fixed‑point design of signal processing blocks.
• RTL coding, simulation, and test bench development.
• FPGA synthesis and timing closure.
• Hardware verification and troubleshooting; familiarity with logic analyzers.
• Provide support to the RF and Software Engineering teams.

Required Qualifications

• Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields.
• Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields.
• Demonstrated experience with fixed‑point binary arithmetic and digital signal processing (DSP) designs.
• Deep knowledge of RTL design fundamentals using Verilog and System‑Verilog.
• Proven expertise working with front‑end RTL design tools, FPGA synthesis, timing closure, multi‑clock‑domain and/or high‑utilization FPGA designs.
• Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
• Must be a U.S. Citizen due to clients under U.S. government contracts.
• All employment is contingent upon the successful clearance of a background check and drug testing.

Preferred Knowledge, Skills, and Abilities

• MS. or Ph.D. degree in Electrical Engineering, Computer Science, or relevant fields.
• Basic MATLAB skills.
• Solid knowledge of scripting languages such as Perl and Python.
• Strong communication and presentation skills.
• Experience with wireless communication systems on FPGA or ASIC designs.

Working Conditions & Physical Requirements

• Office environment.
• Occasional exposure to heat, cold, and allergens while performing tests or demonstrations in the field.
• While performing the duties of this job, the employee is required to:
  • Lift equipment up to 20 lbs. for the set‑up of demonstrations and testing.
  • Perform bending and reaching movements to place items on lower and higher shelves.
  • Kneel or squat to access lower shelves.
  • Walk or move in the labs.

Compensation

Pay range: $165,000 – $250,000 USD. Actual offer will be based on candidate experience and qualifications.

Equal Opportunity Statement

Motorola Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion or belief, sex, sexual orientation, gender identity, national origin, disability, veteran status or any other legally protected characteristic.

NOTE – As a U.S. Federal Contractor, Silvus Technologies requires that ALL candidates being considered for employment for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements (needed for some Engineering or R&D roles) will be included in the Required Qualifications section of the posted position. This does not apply to international positions; only job postings for positions located in the U.S.

We are committed to providing an inclusive and accessible recruiting experience for candidates with disabilities, or other physical or mental health conditions. To request an accommodation, please complete the Reasonable Accommodations Form.