Principal DRAM IO/Clocking Architect

Micron Technology seeks a Senior/Principal SMTS in High-speed IO/Clocking Design Engineering to join our Boise, Idaho team. Relocation to Micron's Boise campus is required, with a focus on defining, designing and verifying IO and clocking circuits for next-generation DRAM products.

You will collaborate with Product Engineering, SI and process integration teams, mentor engineers, and drive robust design practices, timing and jitter analysis, and full-chip verification across product types.