About the RoleThis position is within the MME MCU/MPU Digital IP team. We develop best-in-class digital IPs for NXP’s automotive and advanced microcontroller businesses, delivering sensor and processing technologies that enable secure, connected vehicles today and autonomous vehicles of the future.Job SummaryDefine and execute verification plansDevelop and implement verification testbenchesDevelop testbench components such as drivers, monitors, and scoreboards, and leverage advanced UVM VIPsDevelop directed and constrained-random stimulusAnalyze RTL, functional coverage, and assertion coverage resultsDefine and develop functional coverage modelsDevelop and maintain SystemVerilog assertions (SVA)Apply formal verification methodologiesDemonstrate strong debugging skills, including failure reproduction and root-cause analysisExhibit strong analytical and problem-solving skills; familiarity with major simulation and debug tools is a plusKey ResponsibilitiesDrive a “zero-defect” mindset across the verification teamProvide technical leadership and guidance on complex verification challengesMentor and grow a small team of engineersCross-Functional CollaborationPartner with local and global SoC and IP teams to drive best practices and continuous productivity improvementsDemonstrate outstanding problem-solving and analytical capabilitiesQualificationsBSEE with 8+ years of semiconductor industry experience, orMSEE with 5+ years of experience, orPhD with 3+ years of experienceTechnical SkillsKnowledge of protocols such as DDR, PCIe, AMBA (CHI, ACE, AXI)Strong expertise in Verilog, SystemVerilog (VHDL is a plus)Experience with OVM/UVM and class-based verification methodologiesExperience with formal verification methodologiesExperience leveraging AI/LLM-based approaches to improve engineering efficiencyTest pattern debugging and validation on simulation and automated test environmentsLow-power verification using CPF/UPFScripting in Python, Perl, and UNIX/LinuxExperience with FPGA/emulation/prototyping platforms (e.g., HAPS, Palladium, Zebu) is a plusUnderstanding of power management conceptsFamiliarity with functional and code coverage methodologiesLocationAustin, TX (Hybrid)More information about NXP in the United States...NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.#LI-6692SummaryLocation: Austin (Oakhill, Office)Type: Full time
Principal Digital IP Verification Engineer in austin at Unknown Company
This position is listed as full time and hybrid.