Celero Communications, Inc. is seeking a Principal Physical Verification Engineer to lead the full-chip PV effort at Irvine, CA. You will own execution plans, schedules, and drive milestones toward tapeout readiness, collaborating with analog and block/chip top owners to ensure clean floorplanning.
The role requires 7+ years in full-chip verification, hands-on experience with ICV/Calibre, and deep knowledge of DRC/ER C/PERC rules. Advanced automation skills in Tcl/Python are preferred.
#J-18808-LjbffrPrincipal Chip PV Lead - Full-Chip Verification in irvine at Unknown Company
This position is listed as full time and onsite.