Principal ASIC/FPGA Verification Engineer (Onsite)

Job Overview

We are seeking an experienced and highly motivated Principal Electrical or Computer Engineer to lead the design, implementation, and verification of advanced testbenches for a portfolio of high‑performance digital ASICs and FPGAs. In this role you will drive the development of cutting‑edge signal processing and information assurance technologies supporting critical Mission Systems programs as part of the Microelectronics Technology team. The position is onsite based out of ElSegundo or Fullerton, CA.

Responsibilities

• Design and architecture of verification environments using SystemVerilog with OVM/UVM.
• Write test plans, test cases, and implement code coverage and functional coverage tracking.
• Develop testbenches for the verification of RTL blocks using VHDL or SystemVerilog.
• Recommend new tools and practices for continuous improvement in the ASIC/FPGA verification flow.
• Contribute to engineering estimates for new program pursuits.
• Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status.

Qualifications – Must Have

• Bachelor’s degree in Science, Technology, Engineering or Mathematics (STEM) or an advanced degree with a minimum of 5 years of experience.
• Minimum 8 years of relevant industry experience or 5 years with an advanced degree.
• Active and transferable U.S. government‑issued security clearance required before start date.
• U.S. citizenship required for security clearance eligibility.
• Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment (minimum 4+ years).
• Ability to work independently and mentor junior engineers within a team environment.
• Design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog with chip‑level verification methodologies such as constrained‑random testing, functional coverage analysis, and assertion‑based verification.
• Experience with revision control systems such as Git or Subversion for source code management.

Qualifications – Preferred

• Experience with ASIC/FPGA lab validation and debugging using standard lab equipment.
• Familiarity with DFT, manufacturability, and production test concepts.
• Proficiency with Unix/Linux environments and scripting or software development (C, C++, Python, Perl, or shell).
• Experience with industry‑standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado.
• Strong written and verbal communication skills with ability to work independently and collaboratively in fast‑paced, multidisciplinary engineering environments.

Benefits

• Medical, dental, and vision insurance.
• Three weeks of vacation for newly hired employees.
• Generous 401(k) plan with employer matching funds and separate employer retirement contribution, including a Lifetime Income Strategy option.
• Tuition reimbursement program.
• Student loan repayment program.
• Life insurance and disability coverage.
• Optional additional coverages such as pet insurance, home and auto insurance, critical illness insurance, group legal and ID theft protection.
• Birth, adoption, and parental leave benefits.
• Ovia Health, fertility, and family planning assistance.
• Adoption assistance.
• Autism benefit and employee assistance plan with up to 10 free counseling sessions.
• Healthy You incentives, wellness rewards program.
• Doctor on Demand virtual doctor visits and Teladoc medical experts.
• Bright Horizons child and elder care services.

Equal Opportunity Employer

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified individuals with a disability and protected veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act.