Apple Inc. in Santa Clara, CA, is seeking a Graphics Cache Hierarchy Design Verification Engineer to lead pre-silicon RTL verification of graphics memory subsystems.
The role involves designing verification plans, building test benches, and creating automated verification flows to ensure robust GPU design verification. The successful candidate will have a strong background in computer architecture, SystemVerilog, and verification methodologies, and will collaborate closely with design leads and
#J-18808-LjbffrPre-Silicon Graphics Cache Verification Engineer in santa clara at Unknown Company
This position is listed as full time and onsite.