Power-Aware CPU RTL Design Engineer

Qualcomm Technologies, Inc. in Santa Clara, CA is seeking a Low Power RTL Design Engineer to contribute to power-aware CPU RTL development. You will work with chip architects to specify power architecture and drive UPF-based power intent across RTL to physical implementation.

The role emphasizes experience with Verilog/SystemVerilog, UPF, and Conformal Low Power, along with timing and power considerations. Collaboration with cross-functional teams is essential.