Apple Inc. in Cupertino, CA, seeks a senior hardware design engineer to drive partition architecture, execute netlist to GDS2 flows, and coordinate cross-functional teams for successful design bring-up.
You will perform physical and electrical verification, work with timing and power teams, and ensure manufacturability with DFT and RC network analysis.
This role offers a base pay range of $150,400 to $225,300 per year, benefits, stock programs, and relocation support.
#J-18808-LjbffrPhysical Design Engineer - PNR & Timing Specialist in northern at Unknown Company
This position is listed as full time and onsite.