Qualcomm seeks a Senior Physical Design Engineer to drive implementation of high-performance wireless and 5G SoC blocks from RTL to GDSII. You will own floorplanning, place-and-route, CTS, timing closure, power and area optimization for advanced process nodes. Collaborate with architecture, RTL, DFT, and verification teams to meet aggressive performance and power targets.
Responsibilities include static timing analysis, physical verification, ECO implementation, scripting for flow automation, and working with foundries and EDA vendors. This role suits engineers who thrive in an innovative, fast-paced, globally collaborative environment.
Physical Design Engineer in austin at Unknown Company
This position is listed as full time and onsite.